1. Field of the Invention
The present invention relates to a Group III nitride semiconductor light-emitting device whose main surface is a plane which provides an internal electric field of zero; i.e., a plane which is inclined by 90° with respect to c-plane (e.g., m-plane or a-plane), or a plane which is inclined by about 60° with respect to c-plane.
2. Background Art
Conventionally, Group III nitride semiconductor light-emitting devices are employ as a main surface a c-plane of Group III nitride semiconductor. In such a light-emitting device, an internal electric field is generated in semiconductor crystals due to piezopolarization caused by strain in a crystal structure, which may cause problems, including reduction of emission performance and deterioration of crystallinity. Thus, in recent years, attempts have been made to produce a Group III nitride semiconductor light-emitting device whose main surface is a plane which provides an internal electric field of zero (e.g., m-plane or a-plane). Such a Group III nitride semiconductor light-emitting device having an m-plane or a-plane main surface is particularly suitable for use in, for example, a backlight of a liquid crystal panel, since the light emitted from the device is polarized in a specific direction.
Japanese Patent Application Laid-Open (kokai) No. 2008-109066 discloses a Group III nitride semiconductor light-emitting device whose main surface is a non-polar plane or a semi-polar plane, wherein an electron blocking layer is provided between a light-emitting layer having an MQW structure and a p-contact layer, and the electron blocking layer has a thickness of 28 nm and is formed of Mg-doped AlGaN. The electron blocking layer is provided for preventing flow of electrons to a p-type layer, whereby more effective electron flow to the light-emitting layer can be attained, resulting in improvement of emission performance.
Japanese Patent Application Laid-Open (kokai) No. 2006-36561 discloses a method for forming a Group III nitride semiconductor layer whose main surface is a plane of interest, the method employing an embossed sapphire substrate as a growth substrate.
Since In is less likely to be incorporated into a Group III nitride semiconductor layer whose main surface is a plane which provides an internal electric field of zero, optimal conditions for improving the emission performance of a Group III nitride semiconductor light-emitting device whose main surface is a plane which provides an internal electric field of zero are different from those for improving the emission performance of a conventional Group III nitride semiconductor light-emitting device having a c-plane main surface. The same also applies to an electron blocking layer formed on a light-emitting layer. However, hitherto, detailed studies have not yet been conducted on the optimal structure of an electron blocking layer whose main surface is a plane which provides an internal electric field of zero.